1. Field of the Invention
The present invention relates to an interface unit for controlling data transmission between a data processor unit and a data transfer unit, and more particularly to an interface unit for sending asynchronous data from a data transfer unit (e.g. a peripheral unit) to a central processing unit (CPU).
2. Description of the Prior Art
An interface unit is inserted between a CPU and a peripheral unit to control data transmission therebetween. In general, an input-output control unit or a peripheral adapter unit is well known as the interface unit, and is usually used in a data processing system. For instance, the interface unit is inserted between a CPU and a keyboard unit, a printer unit or the like to control a data communication therebetween. The keyboard unit or another data input unit transfers data to the interface unit with an asynchronous timing against the CPU operation. The interface unit applies the asynchronous data received from the keyboard unit to the CPU at a synchronous timing with the CPU operation. Conventionally, a key data input unit called the Universal Synchronous-Asynchronous Receiver-transmitter (USART) is generally used as the interface unit. The USART has many complex circuits on a semiconductor chip, i.e. a receiver circuit receiving a key data from the keyboard, a detection circuit for detecting key data input timing, a transfer circuit for transferring the key data received into the receiver circuit to the CPU, a timer counter, many registers for storing commands sent from the CPU, a decoder circuit for generating control signals according to the decode operation, etc. Therefore, the USART is very expensive. It requires many terminals for coupling the CPU to the keyboard unit and complex operation is necessary to search and to control a start timing of a key input and a transfer timing of the key input.